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Table 6 Comparison on different hardware implementations for RSMv2 and our proposal

From: A secure and highly efficient first-order masking scheme for AES linear operations

Design Library Scheme Delay Throughput Area Combined Gain
   [nsec] [Gbps] Gain [LUTs] Gain  
Kintex-7 28nm XC7K70T RSMv2 2.916 3.135 31.07% 1599 30.32% 70.78%
  Our Proposal 2.225 4.109   1227   
Virtex-6 28nm XC6VCX75T RSMv2 4.000 2.286 27.73% 1646 34.15% 71.35%
  Our Proposal 3.131 2.920   1227   
Virtex-5 65nm XC5VLX20T RSMv2 4.240 2.156 32.65% 1700 36.11% 80.60%
  Our Proposal 3.197 2.860   1249   
Spartan-3E 90nm XC3S1600E RSMv2 9.003 1.016 28.18% 2501 38.10% 74.38%
  Our Proposal 7.134 1.282   1811