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Table 8 Speedup in popular first-order masking schemes on an Cortex-M4 using simulator

From: A secure and highly efficient first-order masking scheme for AES linear operations

Scheme Linear Operations First-Order Security GF256MUL21 Time [us] Speedup2
Unprotected AES Original Implementation No Computation 3.178
    LUT 14,683  
  Improved Implementation No Computation 14,116  
    LUT 0.362  
SP Original Implementation No Computation 25,177
    LUT 18,661  
  Improved Implementation No Computation 21,001  
    LUT 17,959  
  Our Proposal Yes Computation 22,909  
    LUT 18,922  
ASCAD Original Implementation Yes Computation 41,894
    LUT 28,862  
  Improved Implementation Yes Computation 33,542  
    LUT 27,458  
  Our Proposal Yes Computation 28,214 18.88%
    LUT 24,056 14.14%
RSMv1 Original Implementation No Computation 45,048
    LUT 32,016  
  Improved Implementation No Computation 36,696  
    LUT 30,612  
  Our Proposal Yes Computation 31,368  
    LUT 27,210  
RSMv2 Original Implementation Yes Computation 46,995
    LUT 33,963  
  Improved Implementation Yes Computation 38,643  
    LUT 32,559  
  Our Proposal Yes Computation 33,315 15.99%
    LUT 29,157 11.67%
  More Efficient Proposal Yes Computation 33,279 16.12%
    LUT 29,148 11.70%