Table 1 Reverse-engineered DRAM mapping functions using the method from Pessl et al. (2016)
From: Malware Guard Extension: abusing Intel SGX to conceal cache attacks
Address Bit | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
2 | 2 | 2 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | ||
2 | 1 | 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 9 | 8 | 7 | 6 | ||
2 DIMMs | Channel | ⊕ | ⊕ | ⊕ | ⊕ | ⊕ | ⊕ | ⊕ | ⊕ | ⊕ | ||||||||
BG0 | ⊕ | ⊕ | ||||||||||||||||
BG1 | ⊕ | ⊕ | ||||||||||||||||
BA0 | ⊕ | ⊕ | ||||||||||||||||
BA1 | ⊕ | ⊕ | ||||||||||||||||
Rank | ⊕ | ⊕ | ||||||||||||||||