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Cybersecurity

Table 4 Area of frequently-used logic gates in three different manufacturing processes

From: A circuit area optimization of MK-3 S-box

Logic gate

NOT

AND

NAND

OR

NOR

XOR/XNOR

SMIC 130nm

0.67

1.33

1.00

1.33

1.00

2.33

SMIC 65nm

0.75

1.2

1

1.5

1

2.25

Nangate 45nm

0.67

1.33

1

1.33

1

2

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